EDN

Flip-Flop Using CMOS NAND Gates

Using just two NAND or inverter gates its possible to build a D type (or ‘toggle’) flip-flop with a push-button input. At power-up the output of gate N2 is at a logical ‘1’, ensuring that transistor T2 ...
Ars Technica

Samsung’s “3D Vertical” NAND crams a terabit on a single chip

SSD enthusiasts know all about SLC, MLC, and TLC, but there are some new acronyms in SSD town: V-NAND and CTF. Samsung announced in a press release last night that it has begun mass production of “3D ...
Semiconductor Engineering

Models for Both Strained and Unstrained GAA FETs Using Neural Networks

A new technical paper titled “Impact of Strain on Sub-3 nm Gate-all-Around CMOS Logic Circuit Performance Using a Neural Compact Modeling Approach” was published by researchers at Hanyang University ...
Hosted on MSN

Samsung touts 96% lower-power NAND design — researchers investigate design based on ferroelectric transistors

Samsung researchers have published a detailed account of an experimental NAND architecture that aims to cut one of the technology’s largest power drains by as much as 96%. The work — Ferroelectric ...
C&EN

First Logic Circuits Built From A 2-D Material

Researchers have built logic circuits, the heart of all electronic gadgets, on molybdenum disulfide films that are two molecular layers thick (Nano Lett., DOI: 10.1021/nl302015v). The devices are the ...
Geeky Gadgets

Computer Logic Gates demonstrated using water

YouTuber Steve Mould has created a great demonstration of computer logic gates using water, tubes, and 3D printed components. This innovative approach provides a tangible and visual way to understand ...
Electronic Design

Surrounding Gate Transistors May Improve DRAM

DRAM makes up the bulk of non-volatile memory in computer systems. Much has been done lately to mix non-volatile storage with DRAM. However, DRAM’s performance and capacity still win out when it comes ...